The present invention relates to the field of semiconductor manufacture and, more particularly, to a semiconductor device, e.g., a dynamic random access memory, incorporating an external electrical contact to a conductive layer, e.g., a cell plate of a capacitive storage cell, formed in the interior of the semiconductor device.
A dynamic random access memory (DRAM) chip is an example of a semiconductor device where reliable electrical contacts to an internal conductive layer must be provided. A DRAM chip is a rectangular array of individual circuits organized to store binary information through storage of different levels of voltage in a capacitive charge storage region of the DRAM chip. A transistor structure, including a plurality of transistors, is provided in the DRAM chip to provide access to the charge stored in each charge storage region. Each transistor functions as an on-off switch to open the communication lines between the charge storage region and a microprocessor in communication with the DRAM chip.
A network of electrically conductive cell plate contacts must be provided within the structure of the DRAM chip to enable storage of non-zero voltage levels in each charge storage region. Reliable storage is directly dependent upon the integrity of the cell plate contact. Accordingly, it is necessary to provide cell or top plate contacts characterized by low contact resistance.
Accordingly, there is a continuing need for semiconductor devices incorporating reliable electrical contacts to internal conductive layers.
This need is met by the present invention wherein a semiconductor device, e.g., a dynamic random access memory, is provided incorporating a reliable electrical contact to a conductive layer within the semiconductor device, e.g., a cell or top plate of a capacitive storage cell.
In accordance with one embodiment of the present invention, a method of fabricating a storage container structure is provided comprising the steps of: providing a substrate including a semiconductor structure; forming a patterning stop region; forming an insulating overlayer over a first surface of the substrate and over the patterning stop region; patterning a container region within the insulating overlayer such that the container region defines a container cross section having container side walls, a container bottom wall, and a container interior bounded in part by the container side walls and the container bottom wall, and such that the container bottom wall is at least partially defined by a surface of the patterning stop region; layering a first conductive film over an interior surface of the container region; layering an intermediate insulating film over the first conductive film; layering a second conductive film over the intermediate insulating film such that the second conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that the second film thickness is greater than the first film thickness, and such that the second film portion occupies at least a portion of the container interior; patterning a contact region in the second film portion of the second conductive film; and forming an electrical contact in the contact region such that respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film occupy collectively at least a portion of the container region.
The respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film preferably occupy collectively substantially all of the container region. The patterning stop region may be formed over the first surface of the substrate, within the substrate, or on the substrate. The container region is preferably patterned such that it further defines an upper boundary of the container cross section and the second conductive film is preferably layered such that the second film portion extends from the intermediate insulating film to at least the upper boundary of the container region. The contact region is preferably patterned, and the electrical contact is formed, such that the contact region and the electrical contact extend into the container region beyond the second film portion of the second conductive film.
In accordance with another embodiment of the present invention, a method of fabricating a storage container structure is provided comprising the steps of: providing a substrate including a semiconductor structure; forming a patterning stop region; forming an insulating overlayer over a first surface of the substrate and over the patterning stop region; patterning a container region within the insulating overlayer by removing a portion of an upper overlayer surface, a portion of an intermediate overlayer portion, and a portion of a lower overlayer surface such that (i) the container region defines a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by the upper container boundary, the container side walls, and the container bottom wall, (ii) the upper container boundary is defined by the removed portion of the upper overlayer surface, (iii) the container side walls are defined by the insulating overlayer, and (iv) the container bottom wall is at least partially defined by a surface of the patterning stop region; layering a first conductive film over an interior surface of the container region; layering an intermediate insulating film over the first conductive film; layering a second conductive film over the intermediate insulating film such that the second conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that the second film thickness is greater than the first film thickness, and such that the second film portion occupies at least a portion of the container interior; patterning a contact region in the second film portion of the second conductive film such that the contact region extends into the container region; and forming an electrical contact in the contact region such that respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film occupy collectively at least a portion of the container region. The respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film preferably occupy collectively substantially all of the container region.
In accordance with yet another embodiment of the present invention, a method of fabricating a storage container structure is provided comprising the steps of: providing a substrate including a semiconductor structure; forming a patterning stop region such that the patterning stop region includes a central stop region, a first lateral stop region, and a second lateral stop region; forming an insulating overlayer over a first surface of the substrate and over the patterning stop region; patterning a container region within the insulating overlayer such that the container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and such that (i) the first upper side wall portion and the second upper side wall portion define an upper container portion therebetween, (ii) the first lower side wall portion and the second lower side wall portion define a lower container portion therebetween, (iii) the upper container portion is wider than the lower container portion, (iv) the container bottom wall is defined by the central stop region, (v) the first lower side wall portion is defined by a lateral surface of the first lateral stop region, and (vi) the second lower side wall portion is defined by an opposite lateral surface of the second lateral stop region; layering a first conductive film over an interior surface of the container region; layering an intermediate insulating film over the first conductive film; layering a second conductive film over the intermediate insulating film such that the second conductive film occupies at least a portion of an upper side wall region positioned between the first and second upper side wall portions; patterning a contact region in the second conductive film; and forming an electrical contact in the contact region such that respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film occupy collectively at least a portion of the container region.
Respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film preferably occupy collectively substantially all of the container region. The central stop region may be formed within the substrate and the first and second lateral stop regions may be formed over the first surface of the substrate.
In accordance with yet another embodiment of the present invention, a method of fabricating a storage container structure is provided comprising the steps of: providing a substrate including a semiconductor structure; forming a central patterning stop region; forming a pair of lateral patterning stop regions over a first surface of the substrate such that the lateral patterning stop regions form a substrate topography, the substrate topography including a central void positioned between the lateral patterning stop regions and over the central patterning stop region; forming an insulating overlayer over the first surface of the substrate and over the central and lateral patterning stop regions; patterning a container region within the insulating overlayer such that the container region defines a container cross section having an upper container portion and a lower container portion, such that the lower container portion is positioned within the central void, and such that the upper container portion is wider than the lower container portion; layering a first conductive film over an interior surface of the container region; layering an intermediate insulating film over an interior surface of the container region to define a back fill region such that the back fill region is bounded in part by an interior surface of the intermediate insulating film and such that the back fill region is positioned within the upper container portion; layering a second conductive film over the intermediate insulating film such that the second conductive film occupies at least a portion of the back fill region; patterning a contact region in the second conductive film such that the contact region occupies at least a portion of the upper container portion; and forming an electrical contact in the contact region such that respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a method of fabricating a storage container structure is provided comprising the steps of: providing a silicon semiconductor substrate; forming a central patterning stop region within the substrate such that the central patterning stop region comprises a diffusion layer within the substrate; forming a first lateral patterning stop region over the substrate such that the first lateral patterning stop region comprises a nitride formed over a first portion of doped polysilicon; forming a second lateral patterning stop region over the substrate such that the second lateral patterning stop region comprises a nitride formed over a second portion of doped polysilicon, such that a central void is defined between the first lateral patterning stop region and the second lateral patterning stop region, and such that the central void is positioned over the central patterning stop region; forming an insulating glass overlayer over a first surface of the substrate and over the patterning stop region; selectively etching a container region within the insulating glass overlayer such that the container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and such that (i) the first upper side wall portion and the second upper side wall portion define an upper container portion therebetween, (ii) the first lower side wall portion and the second lower side wall portion define a lower container portion therebetween, (iii) the upper container portion is wider than the lower container portion, (iv) the container bottom wall is defined by the central patterning stop region, (v) the first lower side wall portion is defined by a lateral surface of the first lateral patterning stop region, and (vi) the second lower side wall portion is defined by an opposite lateral surface of the second lateral patterning stop region; layering a first conductive polysilicon film over an interior surface of the container region; layering a dielectric hemispherical grain polysilicon film over the first conductive polysilicon film; layering a second conductive polysilicon film over the dielectric film such that the second conductive film occupies a lower side wall region positioned between the first and second lower side wall portions and at least a portion of an upper side wall region positioned between the first and second upper side wall portions; patterning a contact region in the second conductive film such that the contact region occupies at least a portion of the upper side wall region; and forming an electrical contact in the contact region such that the electrical contact extends along a substantially linear path from the lower side wall region through the upper side wall region to an exposed contact position above the container region, and such that respective portions of the electrical contact, the second conductive film, the dielectric hemispherical grain polysilicon film, and the first conductive film occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a storage container structure is provided comprising: a substrate including a semiconductor structure; a patterning stop region; an insulating overlayer over a first surface of the substrate; a container region within the insulating overlayer, the container region defining a container cross section having container side walls, a container bottom wall, and a container interior bounded in part by the container side walls and the container bottom wall, wherein the container bottom wall is at least partially defined by a surface of the patterning stop region; a charge storage lamina over an interior surface of the container region; a contact region defined by the charge storage lamina, wherein the contact region defines a contact region cross section having contact region side walls and a contact region bottom wall, and wherein the contact region side walls and the contact region bottom wall are defined by a first surface of the charge storage lamina; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a storage container structure is provided comprising: a substrate including a semiconductor structure; a patterning stop region; an insulating overlayer over a first surface of the substrate, the insulating overlayer comprising a lower overlayer surface in contact with the substrate and the patterning stop region, an upper overlayer surface, and an intermediate overlayer portion defined between the lower overlayer surface and the upper overlayer surface; a container region within the insulating overlayer, the container region defining a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by the container side walls, the container bottom wall, and the upper container boundary, wherein (i) the upper container boundary is continuous with the upper overlayer surface, (ii) the container side walls are defined by the insulating overlayer, and (iii) the container bottom wall is at least partially defined by a surface of the patterning stop region; a charge storage lamina over an interior surface of the container region; a contact region defined by the charge storage lamina, wherein the contact region defines a contact region cross section having contact region side walls and a contact region bottom wall, wherein the contact region side walls and the contact region bottom wall are defined by a first surface of the charge storage lamina, and wherein the contact region occupies at least a portion of the container region; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a storage container structure is provided comprising: a substrate including a semiconductor structure; a patterning stop region, wherein the patterning stop region includes a central stop region, a first lateral stop region, and a second lateral stop region; an insulating overlayer over a first surface of the substrate; a container region within the insulating overlayer, wherein the container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, wherein (i) the first upper side wall portion and the second upper side wall portion define an upper container portion therebetween, (ii) the first lower side wall portion and the second lower side wall portion define a lower container portion therebetween, (iii) the upper container portion is wider than the lower container portion, (iv) the container bottom wall is defined by the central stop region, (v) the first lower side wall portion is defined by a lateral surface of the first lateral stop region, and (vi) the second lower side wall portion is defined by an opposite lateral surface of the second lateral stop region; a charge storage lamina over an interior surface of the container region; a contact region defined by the charge storage lamina; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina occupy collectively at least a portion of the container region.
The respective portions of the electrical contact, the second conductive film, the intermediate insulating film, and the first conductive film preferably occupy collectively substantially all of the container region. The central stop region is preferably formed within the substrate and the first and second lateral stop regions are formed over the first surface of the substrate.
In accordance with yet another embodiment of the present invention, a storage container structure is provided comprising: a substrate including a semiconductor structure; a central patterning stop region; a pair of lateral patterning stop regions over a first surface of the substrate wherein a substrate topography defined by the pair of lateral patterning stop regions includes a central void positioned between the lateral patterning stop regions and over the central patterning stop region; an insulating overlayer over the first surface of the substrate; a container region within the insulating overlayer, wherein the container region defines a container cross section having an upper container portion and a lower container portion, wherein the lower container portion is positioned within the central void, and wherein the upper container portion is wider than the lower container portion; a charge storage lamina over an interior surface of the container region; a contact region defined by the charge storage lamina wherein the contact region occupies at least a portion of the upper container portion; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a storage container structure is provided comprising: a silicon semiconductor substrate; a central patterning stop region within a first surface of the substrate, wherein the central patterning stop region comprises a diffusion layer within the substrate; a first lateral patterning stop region over the substrate, wherein the first lateral patterning stop region comprises a nitride over a first portion of doped polysilicon; a second lateral patterning stop region over the substrate, wherein the second lateral patterning stop region comprises a nitride over a second portion of doped polysilicon, wherein a central void is defined between the first lateral patterning stop region and the second lateral patterning stop region, and wherein the central void is positioned over the central patterning stop region; an insulating glass overlayer over the first surface of the substrate; a container region within the insulating glass overlayer, wherein the container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and wherein (i) the first upper side wall portion and the second upper side wall portion define an upper container portion therebetween, (ii) the first lower side wall portion and the second lower side wall portion define a lower container portion therebetween, (iii) the upper container portion is wider than the lower container portion, (iv) the container bottom wall is defined by the central patterning stop region, (v) the first lower side wall portion is defined by a lateral surface of the first lateral patterning stop region, and (vi) the second lower side wall portion is defined by an opposite lateral surface of the second lateral patterning stop region; a first conductive polysilicon film over an interior surface of the container region; a dielectric hemispherical grain polysilicon film over the first conductive polysilicon film; a second conductive polysilicon film over the dielectric hemispherical grain polysilicon film, wherein the second conductive film occupies at least a portion of an upper side wall region positioned between the first and second upper side wall portions; a contact region in the second conductive film, wherein the contact region occupies at least a portion of the upper side wall region; and an electrical contact in the contact region, wherein the electrical contact extends along a substantially linear path from the lower side wall region through the upper side wall region to an exposed contact position above the container region, and wherein the electrical contact, the second conductive film, the dielectric hemispherical grain polysilicon film, and the first conductive film occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a method of fabricating a semiconductor device is provided comprising the steps of: providing a substrate including a semiconductor structure; forming a patterning stop region; forming an insulating overlayer over a first surface of the substrate and over the patterning stop region, such that the insulating overlayer comprises a lower overlayer surface in contact with the substrate and the patterning stop region, an upper overlayer surface, and an intermediate overlayer portion defined between the lower overlayer surface and the upper overlayer surface; patterning a container region within the insulating overlayer by removing a portion of the upper overlayer surface, a portion of the intermediate overlayer portion, and a portion of the lower overlayer surface such that (i) the container region defines a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by the upper container boundary, the container side walls, and the container bottom wall, (ii) the upper container boundary is defined by the removed portion of the upper overlayer surface, (iii) the container side walls are defined by the insulating overlayer, and (iv) the container bottom wall is at least partially defined by a surface of the patterning stop region; (v) layering a conductive film over an interior surface of the container region such that the conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that the second film thickness is greater than the first film thickness, and such that the second film portion occupies at least a portion of the container interior; patterning a contact region in the second film portion of the conductive film such that the contact region extends into the container region; and forming an electrical contact in the contact region such that respective portions of the electrical contact and the conductive film occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a method of fabricating a semiconductor device is provided comprising the steps of: providing a substrate including a semiconductor structure; forming a patterning stop region such that the patterning stop region includes a central stop region, a first lateral stop region, and a second lateral stop region; forming an insulating overlayer over a first surface of the substrate and over the patterning stop region; patterning a container region within the insulating overlayer such that the container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and such that (i) the first upper side wall portion and the second upper side wall portion define an upper container portion therebetween, (ii) the first lower side wall portion and the second lower side wall portion define a lower container portion therebetween, (iii) the upper container portion is wider than the lower container portion, (iv) the container bottom wall is defined by the central stop region, (v) the first lower side wall portion is defined by a lateral surface of the first lateral stop region, and (vi) the second lower side wall portion is defined by an opposite lateral surface of the second lateral stop region; layering a conductive film over an interior surface of the container region such that the conductive film occupies at least a portion of an upper side wall region positioned between the first and second upper side wall portions; patterning a contact region in the conductive film; and forming an electrical contact in the contact region such that respective portions of the electrical contact and the conductive film occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a semiconductor device is provided comprising: a substrate including a semiconductor structure; a patterning stop region, wherein the patterning stop region includes a central stop region, a first lateral stop region, and a second lateral stop region; an insulating overlayer over a first surface of the substrate; a container region within the insulating overlayer, wherein the container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, wherein (i) the first upper side wall portion and the second upper side wall portion define an upper container portion therebetween, (ii) the first lower side wall portion and the second lower side wall portion define a lower container portion therebetween, (iii) the upper container portion is wider than the lower container portion, (iv) the container bottom wall is defined by the central stop region, (v) the first lower side wall portion is defined by a lateral surface of the first lateral stop region, and (vi) the second lower side wall portion is defined by an opposite lateral surface of the second lateral stop region; a conductive layer over an interior surface of the container region; a contact region in the conductive film; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the conductive film occupy collectively at least a portion of the container region.
In accordance with yet another embodiment of the present invention, a method of fabricating a memory device is provided comprising the steps of: forming a storage container structure according to any of the embodiments of the present invention described herein; and coupling a bit line terminal to a charge storage lamina through a switching structure such that the charge storage lamina comprises the first conductive film, the intermediate insulating film, and the second conductive film, and such that a charge transfer status of the switching structure changes in response to a memory access command.
In accordance with yet another embodiment of the present invention, a memory device is provided comprising: a storage container structure according to any of the embodiments of the present invention described herein; and a bit line terminal coupled to the charge storage lamina through a switching structure, wherein a charge transfer status of the switching structure changes in response to a memory access command.
In accordance with yet another embodiment of the present invention, a method of fabricating a computer system is provided comprising the steps of: forming a storage container structure according to any of the embodiments of the present invention described herein; coupling a bit line terminal to a charge storage lamina through a switching structure such that the charge storage lamina comprises the first conductive film, the intermediate insulating film, and the second conductive film, and such that a charge transfer status of the switching structure changes in response to a memory access command; and providing a microprocessor in communication with a plurality of the storage container structures via respective ones of a plurality of the bit line terminals.
In accordance with yet another embodiment of the present invention, a computer system is provided comprising: a storage container structure according to any of the embodiments of the present invention described herein; a bit line terminal coupled to the charge storage lamina through a switching structure, wherein a charge transfer status of the switching structure changes in response to a memory access command; and a microprocessor in communication with a plurality of the charge storage structures via respective ones of a plurality of the bit line terminals.
Accordingly, it is an object of the present invention to provide semiconductor devices incorporating reliable electrical contacts to internal conductive layers of the semiconductor device.